Huawei Fund JWSE Optical Clocking Project
Published: 4 April 2022
Huawei Technology (Sweden) award funding to radical project led by Professor John Marsh and Dr Lianping Hou
Mode Locked Semiconductor Lasers for On-chip Optical Clock Distribution
The project “Mode Locked Semiconductor Lasers for On-chip Optical Clock Distribution” has been funded for 15 months by Huawei Technology (Sweden) with €350,000. Due to their strong research background in semiconductor mode locked lasers (SMLLs), the principal and co-principal are Professor John Marsh and Dr Lianping Hou. They previously achieved a shortest pulse width of 440 fs from a Multiple Quantum Well (MQW) SMLL.
The central aim of the project is to develop semiconductor mode locked lasers for generating optical clock signals for electrical systems such as CMOS circuits.
The clock is the heartbeat of an electrical system, and most communication and processing functions in CMOS chips are triggered by a clock edge. An unstable clock can cause a system to fail or will limit its frequency range of operation. Electrical clock signals are typically generated on-chip and distributed to end nodes through a symmetrical network of wires. As the number of end nodes has grown with Moore’s Law scaling, the jitter and skew in electrical clock distribution have become a bottleneck to the speed of CMOS chips.
Optical clocking is a radical approach in which a mode locked laser is used as a precision time source with low timing jitter, and optical distribution schemes are used instead of wire networks.
Prof John Marsh and Dr Lianping Hou said: “We have been working on SMLLs for several years and are delighted to work with Huawei on this exciting project”.
First published: 4 April 2022
