Mr Jude Haris
- Research Assistant (Computing Science)
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Saha, R. , Haris, J. and Cano, J. (2024) Accelerating Pot Quantization on Edge Devices. In: 31st IEEE International Conference on Electronics, Circuits and Systems, Nancy, France, 18-20 Nov 2024, (Accepted for Publication)
Haris, J., Gibson, P., Cano, J. , Bohm Agostini, N. and Kaeli, D. (2023) SECDA-TFLite: a toolkit for efficient development of FPGA-based DNN accelerators for edge inference. Journal of Parallel and Distributed Computing, 173, pp. 140-151. (doi: 10.1016/j.jpdc.2022.11.005)
Haris, J., Gibson, P., Cano, J. , Bohm Agostini, N. and Kaeli, D. (2023) SECDA-TFLite: a toolkit for efficient development of FPGA-based DNN accelerators for edge inference. Journal of Parallel and Distributed Computing, 173, pp. 140-151. (doi: 10.1016/j.jpdc.2022.11.005)
Saha, R. , Haris, J. and Cano, J. (2024) Accelerating Pot Quantization on Edge Devices. In: 31st IEEE International Conference on Electronics, Circuits and Systems, Nancy, France, 18-20 Nov 2024, (Accepted for Publication)